Today's data-intensive audio, video and communications applications require high-bandwidth systems capable of real-time processing. As such, a primary goal in the design of modern processing units is maximizing throughput.
One of the most prevalent mechanisms for enhancing throughput in computing machines is the use of parallel processing. Parallel processing is the simultaneous execution of a set of tasks (split up and specially adapted) on multiple processors on multiple data segments in order to obtain results faster.
Systems having multiple interfaces linking the data sources and the processing resources are generally disfavored in circuit design as they can result in routing and pin congestion issues in application specific integrated circuits (ASIC). Routing a high number of signals requires physical space which is always at a premium in today's ever shrinking processing units. Likewise, for a given physical package, a predetermined pin count may already exist.
Instead, single-interface systems are commonly implemented. These single-interface systems utilize a data routing arbitration mechanism to establish a channel hierarchy to facilitate the transfer of data from multiple sources to multiple processors across a shared data path. Such systems, while more complex, require less board space and are more flexible in adapting to the pin requirements of existing physical packages.
However, the use of single-interface systems may also operate as a bottleneck to the required rapid transmission of data. In order to achieve the benefits of parallel computing, it is imperative that data routing to the respective processors occur in an efficient manner. The efficiency of the data arbitration algorithm is a primary factor in determining the overall throughput of a given parallel system. If only a few data and processing channels are allowed to dominate the interface, there is little or no advantage to incorporating a parallel system. Additionally, processors may require varying amounts of time to process certain data elements. As such, data channels must be routed to the various processors in a judicious manner such that no processing channel is starved if its corresponding data channel has pending data and, similarly, no pending data is blocked if its corresponding processing channel is requesting data.
An example of an application in which multiple parallel requesters are accessing a single resource, where a fair (equal priority) arbitration scheme is desired is cryptography. Cryptography systems are often utilized to prevent the interception of data when transmitted over public networks. The systems scramble data to prevent unauthorized access. Data segments may be processed by one of a plurality of encoders and then again by one of a plurality of decoders. Due to the nature of encrypt/decrypt systems, a given block of data may take more or less time to process than another block of equal size. As such, a cryptographic system must be able to route any data source channel to its corresponding processing channel at any time in order to maximize throughput.
However, the task of coordinating which data segments are to be routed to a given processor can be a complex task. For this reason, many priority schemes have been developed and implemented which govern the direction of data to associated parallel processors.
Simple static arbitration schemes have been used to direct data source channels having varying degrees of priority. In such schemes, when an interface receives an indication that data is pending on a high-priority channel, the transmission of data on lower-priority channels to the processors is halted until the higher-priority data is processed. However, this scheme is ineffective in applications where there is no inherent priority between the source channels (i.e. fair arbitration).
Additionally, dynamic rotating arbitration schemes have also been utilized in source data routing. These schemes are generally capable of varying their channel priority hierarchy. However, such systems, while more robust in their ability to handle priority-associated data sources, still suffer from the same channel-priority dependence as the static schemes. Their priority decisions, while fluid in nature, remain dependent on a predetermined dynamic rotation. Such schemes are unable to make decisions based on data source availability and processing resource readiness.
Therefore, it would be desirable to provide a system and a method for arbitrating between multiple data source/processing resource channels where the channels have equal priority, the arbitration has a determinable maximum latency, and no processing channel is starved or blocked.
Further, it would be desirable to provide a system and a method for arbitrating between multiple data source/processing resource channels where the availability of the data source and processing resources dictate the function of the arbitration.